Appendix · Module 11

Inference Runtimes: the serving stacks

A model isn't one giant GPU kernel — it's a graph of kernels (matmul, ReLU, attention) composed and driven by a runtime. This finale tours the production stacks that do that driving — TensorRT‑LLM, Triton, vLLM, and SGLang — and shows how every technique from the series lives inside them.

The serving stack: a request's round trip

step-through

Follow one request down the stack — gateway, scheduler, engine, kernels, GPU — and watch generated tokens stream back up.

request / tokens stack layer · engine GPU execution KV-cache feature

That whole column is what a runtime provides. The article splits the field two ways. NVIDIA's stack keeps a clean frontend / backend divide — TensorRT(-LLM) is the backend that runs the model on GPUs, and the Triton Inference Server is the frontend that routes and batches requests to backends. The cross-platform stacks — vLLM and SGLangflatten that divide, providing the network face, the scheduler, and the kernels all in one.

Four runtimes, four signatures

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Each card pulses its defining trait. They map straight back to earlier modules — paging, prefix caching, kernel fusion, and orchestration.

engine KV / cache trait kernel / compute trait routing / frontend
Maps to the series vLLM → PagedAttention & continuous batching (Module 4). SGLang → RadixAttention / prefix caching plus a structured frontend (Modules 4&8). TensorRT‑LLM → ahead-of-time compiled, fused kernels (Modules 5&10). Triton → the orchestration layer that hosts any of these backends.

Inside the engine, at work

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The whole series in one frame: the scheduler forms a continuous batch, KV lives in paged blocks, a new request hits a prefix-cache, and tokens stream out.

request · token paged KV block GPU step (decode) prefix-cache hit

One last distinction the article draws: when the optimization happens. TensorRT does it ahead of time in a one-time compile — analyse the graph, pick kernels, fuse ops, quantize for the target GPU. vLLM and SGLang have no explicit compile step; they optimize a little at startup (a kernel pipeline they cache and reuse, optionally via torch.compile) and spend the rest of their effort on runtime scheduling. Same goal, different split between static and dynamic.

Static vs dynamic: where the optimization lives

step-through

A model's journey to served tokens crosses two regimes — an offline compile phase and an online scheduling phase. Engines sit at different points along that line.

compile-time (static) kernel work runtime (dynamic) per-request state
Series wrap-up Across eleven modules you've gone from a single attention head to a full serving stack. A transformer (M1) becomes tractable with the KV cache (M2); sharding (M3) spreads it across GPUs; batching, paging & scheduling (M4), I/O-aware kernels (M5), speculative decoding (M6), prefill/decode disaggregation (M7), and KV offload (M8) each claw back latency and memory. The runtimes here — TensorRT‑LLM, Triton, vLLM, SGLang — are where all of it ships as one system. That's the stack.