Arithmetic intensity
Operations per byte moved
Locates an operation relative to the hardware roofline knee.
2
Read a model as a sequence of operations, representations, and memory transfers; its architecture predicts which inference resource will become scarce.
12 min read
Printed pages: 39–70
Generative models compose large neural networks, and inference performance follows the work those networks demand. Language models tokenize a prompt, process every input position during prefill, store reusable attention state in a KV cache, and then decode one token per forward pass. Prefill is usually compute bound and largely determines time to first token (TTFT); decode is usually memory bound and determines tokens per second (TPS). Diffusion image and video systems instead refine an entire latent representation repeatedly and are generally compute bound. Arithmetic intensity, the ratio of operations to memory traffic, places each workload on a hardware roofline and explains why one optimization cannot accelerate every phase. Architecture knowledge turns performance tuning from folklore into bottleneck-directed engineering.
Token input flows into Transformer work and then branches: Prefill path moves toward the Compute-bound region above the Roofline knee, while Decode path moves toward the Memory-bound region below the knee.
A model is not a uniform block of floating-point work. Linear layers hold much of a language model’s weight, attention moves and combines sequence state, sparse experts alter which parameters are active, and media pipelines call several component models over many denoising steps. These choices determine weight reads, intermediate tensors, cache growth, parallelism opportunities, and quality-sensitive approximations. An optimization aimed at the wrong resource can leave the expensive path unchanged.
The prefill and decode split is especially important because one request changes bottleneck midway through execution. Faster matrix computation helps a compute-heavy prompt phase, while memory movement and reuse dominate one-token-at-a-time generation. Treating both as one average hides the reason TTFT and TPS respond differently to batching, hardware, kernels, and placement. A useful model of inference must preserve phases rather than flattening them.
Reason from execution shape before model or accelerator names. A configuration file reveals layer count, hidden dimensions, attention heads, vocabulary, and whether feed-forward layers are dense or expert-routed. Request data reveals sequence length, batch, output length, and media dimensions. Together they predict the large tensors and repeated loops. Hardware then supplies compute and bandwidth ceilings; the implementation determines how closely work approaches them. This order survives product generations. It also explains why two variants of one architecture can inherit the same runtime support while still producing different capacity needs at different sizes, and why a newer GPU does not remove an algorithmic pattern that scales badly with context or latent volume. Starting from brand or peak specifications can assign supposedly faster hardware to decode that is actually limited by memory traffic, or apply token-generation techniques to whole-latent denoising. Starting from execution shape instead produces resource hypotheses to test before selecting the model, kernel, and hardware most likely to change the bottleneck.
Use a four-link chain when reading performance. First identify the semantic operation, such as attention, a feed-forward layer, expert routing, or denoising. Second identify execution shape: full-sequence matrix work, one-token vector work, sparse routing, or whole-latent updates. Third identify the stressed resource through bytes, operations, cache state, and repetition count. Finally connect that resource to the product metric: first-output latency, token cadence, image completion, video completion, capacity, or cost. Skipping a link encourages cargo-cult tuning: copying a kernel without checking local matrix shapes and data flow, or buying higher peak compute without confirming that memory is not the limit. Following the chain makes each proposed change testable and clarifies when a technique transfers across modalities or fails because the execution loop is fundamentally different. It also aligns communication: model researchers describe operations, systems engineers describe resources, and product teams describe visible outcomes against the same request and measurement. Remeasuring with identical inputs and workload slices confirms that an apparent gain did not come from changed data or test conditions.
Arithmetic intensity = floating-point operations ÷ bytes movedOperations per byte moved
Locates an operation relative to the hardware roofline knee.
Peak operations per second ÷ peak bytes per second
Provides the comparison point between memory and compute limits for a chosen precision.
Primary contributor to TTFT
Tracks the compute-heavy work of processing prompt positions and constructing the KV cache.
Primary contributor to TPS
Tracks repeated weight reads and one-token generation in the memory-heavy phase.
State grows with active sequence length
Signals memory capacity and movement pressure created by retained attention state.
Steps × forward passes per step
Connects image or video latency to loop length, guidance, latent size, and model cost.
FlashAttention-style fused kernels remove excess memory traffic without changing model outputs, and PagedAttention manages fragmented KV-cache blocks; both preserve the underlying attention rule and scaling. Sliding-window, gated, linear, compressed, or multi-latent attention changes the work and may trade quality for better time or space complexity. State-space designs such as Mamba replace attention with recurrent state updates, while hybrid models mix both families.
Dense models use every parameter predictably. MoE reduces active parameters for an individual token, but routing, expert placement, and diverse batched requests complicate memory use and multi-GPU execution.
The KV cache avoids repeating prior key and value calculations, turning decode attention into practical incremental work. It consumes increasing GPU memory and motivates paging, placement, and reuse strategies.
More diffusion steps provide repeated refinement but add forward passes. Few-step consistency or distilled models can be dramatically faster, with visibly lower quality that may still suit latency-sensitive effects.
Updating the full space-time latent limits framewise drift and lets frames attend across time, but fixes short output lengths and requires very expensive attention. Autoregressive elements aim to relax that cost without returning to uncontrolled error accumulation.
Decode for one request has low arithmetic intensity. Batching uses the same weight load for more work and moves the operation toward compute use, but changes latency, cache demand, and which experts become active.
Printed pages 41–42
Introduces neural models, transformers, autoregression, and iterative denoising.
Printed pages 42–46
Builds intuition for representations, layers, matmul, and nonlinear activation.
Printed pages 46–49
Traces token preparation, prefill, decode, logits, sampling, and stopping.
Printed pages 49–53
Explains transformer blocks, attention inputs, heads, masks, and KV caching.
Printed pages 53–54
Describes sparse expert routing and its production batching behavior.
Printed pages 55–59
Maps image pipelines, latent diffusion, guidance, architecture growth, and few-step models.
Printed pages 59–61
Explains space-time latent generation, global attention, and resource limits.
Printed pages 61–63
Defines arithmetic intensity and the memory-to-compute roofline transition.
Printed pages 63–67
Derives prefill, decode, image, and video bottlenecks from work and memory traffic.
Printed pages 67–70
Surveys implementation, paging, approximate attention, and state-space approaches.